The present disclosure relates to a semiconductor device, a solid-state imaging device, a method for manufacturing a semiconductor device, a method for manufacturing a solid-state imaging device, and electronic apparatus.
A solid-state imaging device of a CMOS (Complementary Metal Oxide Semiconductor) image sensor (CIS) mounted type is configured by forming a unit pixel made with a photodiode serving as a light receiving part and plural transistors on a semiconductor substrate and two-dimensionally arranging the unit pixels. The plural transistors include e.g. a charge transfer transistor (TRG), an amplification transistor (AMP), a reset transistor (RST), and a selection transistor (SEL). It is also possible to employ a configuration in which these transistors are shared by plural light receiving parts. The respective terminals of these plural transistors are connected by multilayer interconnects in order to apply desired voltage pulses to these transistors and read out a signal current.
In the case of a back-illuminated imaging device, light receiving parts, transistors, and interconnect layers are formed in multiple layers on a semiconductor substrate. Thereafter, the front surface side, in which the interconnect layers are formed, is bonded to a support substrate and the semiconductor substrate is polished from the back surface to a desired thickness. The back surface side is used as the light incident surface side. In this case, color filters and on-chip lenses are formed over the polished back surface to thereby form a configuration in which light is incident on the light receiving parts from this back surface side without passing through the interconnect layers. This increases the aperture ratio and realizes an imaging device having high sensitivity.
Examples of documents relating to the related art include Japanese Patent Laid-open No. 2003-318122 (hereinafter, Patent Document 1).